DDR PCTL controller
-------------------

DDR-PCTL controller can be described as a parent node with instances of
the IP as child nodes. The mandatory properties are:
- #address-cells: number of cells required to define the base address
		  that is memory mapped. Should be 1.
- #size-cells: number of cells to describe the size of the memory mapped area.
	       Should be 1.
- compatible: should be "simple-bus" for non 407-family SoCs, while it should be
	      "st,stih407-ddr-controller" for 407-family SoCs. For 407-family SoCs,
	      "simple-bus" is optional.
No other properties are required.

The child nodes have the name format as "ddr-pctl@base-address",
where base-address is the memoery mapped physical address of the IP.
The mandatory properties are:
- compatible: should be st,ddr-controller
- reg: should be a list property with first cell indicating the physical
base address of the IP and the second cell indicating the size of the
memory mapped region.

No other properties are required.

Example:
	ddr-pctl-controller {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		compatible = "st,stih407-ddr-controller";
		ddr-pctl@09010000 {
			compatible = "st,ddr-controller";
			reg = <0x09010000 0x2000>;
		};
	};
