* Marvell Armada 375 Ethernet Controller (PPv2)

Required properties - common part:
- compatible: should be "marvell,armada-375-pp2"
- reg: addresses and length of the register sets for the device.
  Minimum 3 sets are required:
	- common controller registers
	- LMS registers
	- GbE MAC0 registers
	- GbE MAC1 registers
	- Other port's registers (the driver enables extending the list
	  with another GbE MAC's or PON port in future)
- phy-mode: the interface between the SoC and the PHY (a string that
  of_get_phy_mode() can understand)
- clocks: a pointer to the reference clocks for this device, consequently:
	- main Packet Processor clock
	- GOP clock
- clock-names: names of used clocks

The Ethernet/PON ports are represented by their subnodes. The presence of
at least one is required. The order of the subnodes is not important,
however related register sets have to be declared in the common part
accordingly.

Required properties - port part:
- interrupts: port interrupt id
- port-id: port is recognized by it's id field which should fit predefined
  values in HW, e.g. ethernet MACs (id=0/1), loopback (id=2)
- phy-mode: the interface between the SoC and the PHY (a string that
  of_get_phy_mode() can understand)

Optional properties - port part:

- marvell,loopback: set GMAC to loopback mode
- phy: a phandle to a phy node defining the PHY address (as the reg
  property, a single integer). Note: if this property isn't present,
  then fixed link is assumed, and the 'fixed-link' property is
  mandatory.

Examples:

pp2@f0000 {
	compatible = "marvell,armada-375-pp2";
	reg = <0xf0000 0xa000>,
	      <0xc0000 0x3060>,
	      <0xc4000 0x100>,
	      <0xc5000 0x100>;
	clocks = <&gateclk 3>, <&gateclk 19>;
	clock-names = "pp_clk", "gop_clk";
	status = "ok";

	eth0: ethernet@c4000 {
		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
		port-id = <0>;
		status = "ok";
		phy = <&phy0>;
		phy-mode = "gmii";
	};

	eth1: ethernet@c5000 {
		interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
		port-id = <1>;
		status = "ok";
		phy = <&phy3>;
		phy-mode = "gmii";
	};
};
